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(R)
LF155-LF255-LF355 LF156-LF256-LF356 LF157-LF257-LF357 WIDE BANDWIDTH SINGLE J-FET OPERATIONAL AMPLIFIERS
.HI .HI .OFFSETVOLTAGEADJUSTMENTDOESNOT .I
TYPICAL APPLICATIONS SION HIGH SPEED INTEGRATORS A AND CONVERTERS GH IMPEDANCE BUFFERS DEBAND, LOW NOISE, LOW DRIFT AMPLIFIERS THIMIC AMPLIFIERS FIERS RCUITS
GH INPUT IMPEDANCE J-FET INPUT STAGE GH SPEED J-FET OP-AMPs : up to 20MHz, 50V/s DEGRADE DRIFT OR COMMON-MODE REJECTION AS IN MOST OF MONOLITHIC AMPLIFIERS NTERNAL COMPENSATION AND LARGE DIFFERENTIAL INPUT VOLTAGECAPABILITY (UP TO VCC+)
N DIP8 (Plastic Package)
D SO8 (Plastic Micropackage)
.PRECI .FASTD/ .HI .WI .LOGARI .PHOTOCELLAMPLI .SAMPLEANDHOLDCI
ORDER CODES
Part Number LF355, LF356, LF357 LF255, LF256, LF257 LF155, LF156, LF157 Example : LF355N Temperature Range 0 C, +70 C -40oC, +105oC -55 C, +125 C
o o o o
Package N * * * D * * *
PIN CONNECTIONS (top view)
1
DESCRIPTION These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift,coupledwith offsetadjust which doesnot degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth,extremelyfastsettlingtime, lowvoltageand current noise and a low 1/f noise level.
July 1998
8 7 6 5
1 2 3 4 - Offset Null 1 - Inverting input - Non-inverting input - VCC5 6 7 8 Offset Null 2 Output + VCC N.C.
2 3 4
1/14
LF155 - LF156 - LF157
SCHEMATIC DIAGRAM
V i o ADJUSTMENT
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vi Vid Ptot Toper Supply Voltage Input Voltage - (note 1) Differential Input Voltage Power Dissipation Output Short-circuit Duration Operating Free Air Temperature Range LF155-LF156-LF157 LF255-LF256-LF257 LF355-LF356-LF357 Parameter Value 22 20 40 570 Infinite -55 to +125 -40 to +105 0 to 70 -65 to 150
o
Unit V V V mW C
Tstg
Storage Temperature Range
o
C
2/14
LF155 - LF156 - LF157
ELECTRICAL CHARACTERISTICS LF155, LF156, LF157 -55oC Tamb +125oC LF255, LF256, LF257 -40oC Tamb +105oC (unless otherwise specified)
Symbol Vio Parameter Input Offset Voltage (R S = 50) Tamb = 25oC Tmin. Tamb Tmax. Input Offset Current - (note 3) o Tamb = 25 C Tmin. Tamb Tmax. Input Bias Current - (note 3) Tamb = 25oC Tmin. Tamb Tmax.
5V VCC 20V 5V VCC 20V
LF155 - LF156 - LF157 LF255 - LF256 - LF257 Min. Typ. Max. 3 5 7 6.2 20 20 1 100 50 5 pA nA nA pA nA nA V/mV
Unit mV
LF155, LF156, LF157 LF255, LF256, LF257 3 LF155, LF156, LF157 LF255, LF256, LF257 20
Iio
Iib
Avd SVR ICC
DV io DV io/Vio Vicm CMR VOPP GBP
LF155, LF156, LF157 LF255, LF256, LF257 Large Signal Voltage Gain (RL = 2k, VO = 10V, VCC = 15V) o Tamb = 25 C Tmin. Tamb Tmax. Supply Voltage Rejection Ratio - (note 4) Supply Current (VCC = 15V, no load) LF155, LF255 Tamb = 25oC LF156, LF256 LF157, LF257 Input Offset Voltage Drift (RS = 50) Change in Average Temperature Coefficient with Vio adjust (RS = 50) - (note 2) Input Common Mode Voltage Range (VCC = 15V, Tamb = 25oC) Common Mode Rejection Ratio Output Voltage Swing (VCC = 15V) R L = 10k R L = 2k Gain Bandwidth Product (VCC = 15V, Tamb = 25oC) LF155, LF255 LF156, LF256 LF157, LF257 o Slew Rate (VCC = 15V, Tamb = 25 C) LF155, LF255 AV = 1 LF156, LF256 LF157, LF257 AV = 5 Input Resistance (Tamb = 25oC) Input Capacitance (VCC = 15V, Tamb = 25oC) Equivalent Input Noise Voltage (VCC = 15V, Tamb = 25oC, R S = 100) f = 1000Hz LF155, LF255 LF156, LF256 LF157, LF257 f = 100Hz LF155, LF255 LF156, LF256 LF157, LF257 Equivalent Input Noise Current (VCC = 15V, Tamb = 25oC, f = 100Hz or f = 1000Hz) Settling Time (VCC = 15V, Tamb = 25oC) - (note 5) LF155, LF255 LF156, LF256 LF157, LF257
50 25 85
200 100 2 5 5 5 0.5 4 7 7 V/ C o V/ C V dB V
o
dB mA
11 85 12 10
+15.1 -12 100 13 12 2.5 5 20
MHz
SR
V/s 7.5 30 5 12 50 1012 3
Ri Ci en
20 12 12 25 15 15 0.01 4 1.5 1.5
pF nV Hz
in ts
pA Hz s
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LF155 - LF156 - LF157
ELECTRICAL CHARACTERISTICS LF355, LF356, LF357 0oC Tamb +70oC
Symbol Vio Iio Iib Avd SVR ICC DV io DV io/Vio Vicm CMR VOPP GBP Parameter Input Offset Voltage (R S = 50) Tamb = 25oC Tmin. Tamb Tmax. Input Offset Current - (note 3) o Tamb = 25 C Tmin. Tamb Tmax. Input Bias Current - (note 3) o Tamb = 25 C Tmin. Tamb Tmax. Large Signal Voltage Gain (RL = 2k, VO = 10V) o Tamb = 25 C Tmin. Tamb Tmax. Supply Voltage Rejection Ratio - (note 4) Supply Current (no load) o LF355 Tamb = 25 C LF356, LF357 Input Offset Voltage Drift (RS = 50) - (note 2) Change in Average Temperature Coefficient with Vio adjust (RS = 50) Input Common Mode Voltage Range (Tamb = 25oC) Common Mode Rejection Ratio Output Voltage Swing Gain Bandwidth Product Tamb = 25 C)
o o
VCC = 15V, (unless otherwise specified)
LF355 - LF356 - LF357 Min. Typ. Max. 3 10 13 50 2 200 8 pA nA pA nA V/mV Unit mV
3
20
25 15 80
200 100 2 5 5 0.5 4 10 V/oC o V/ C per mV V dB V MHz dB mA
10 80 12 10
RL = 10k RL = 2k LF355 LF356 LF357 LF355 LF356 LF357
+15.1 -12 100 13 12 2.5 5 20 5 12 50 12 10 3 20 12 25 15 0.01 4 1.5
SR
Slew Rate (Tamb = 25 C) AV = 1
V/s
Ri Ci en
in ts
AV = 5 o Input Resistance (Tamb = 25 C) o Input Capacitance (Tamb = 25 C) Equivalent Input Noise Voltage (Tamb = 25oC, RS = 100) f = 1000Hz LF355 LF356, LF357 f = 100Hz LF355 LF356, LF357 Equivalent Input Noise Current o (Tamb = 25 C, f = 100Hz or f = 1000Hz) Settling Time (Tamb = 25oC) - (note 5) LF355 LF356, LF357
pF nV Hz
pA Hz s
Notes : 1. Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. 2. The temperature coefficient of the adjusted input offset voltage changes only a small amount (0.5V/oC typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open loop voltage gain are alsounaffected by offset adjustment. 3. The input bias currents are junction leakage currents which approximately double for every 10oC increase in the junction temperature Tamb. Due to limited production test time, the input bias current measured is correlated to junction temperature. In a normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, Ptot-Tamb =Tamb +Rth(j-a) xPtot where Rth(j-a) is the thermal resistance from junction to ambient. Use of a heatsink is recommended f input currents are to be kept to a minimum. 4. Supply voltage rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practise. 5. Settling time is defined here, for a unity gain inverter connection using 2k resistors for the LF155, LF156 series. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF157 series AV = -5, the feedback resistor from output to input is 2k and the output step is 10V.
4/14
LF155 - LF156 - LF157
APPLICATION HINTS The LF155, LF156, LF157 series are op amps with JFETinput transistors. TheseJFETs havelarge reverse breakdown voltagesfromgatetosource or drain eliminatingtheneed of clamps across the inputs.Therefore large differential input voltages can easily be accommodatedwithoutalarge increaseof inputcurrents. The maximum differential input voltage is independent of the supply voltage. However, neitherof thenegativeinput voltagesshouldbe allowed to exceedthe negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-modelimit on either inputwill causeareversal of thephasetotheoutputandforce the amplifier output to the correspondinghigh or lowstate. Exceedingthe negativecommon-mode limit on bothinputs will force the amplifier outputto a highstate.In neithercasedoes a latch occur since raising the input back within the common-mode range again puts the input stage and thustheamplifierin a normal operatingmode. Exceedingthepositive common-modelimit on asingle input will not changethephase of the output however, if bothinputsexceedthe limit, theoutput of theamplifier will be forcedto ahighstate.Theseamplifiers will operatewith the common-mode input voltage equal to the positive supply. In fact, the common-modevoltagecanexceedthepositivesupplyby approximately 100mV independentof supply volt-age and over thefull operatingtemperaturerange.The positive suplly can thereforebe used as a referenceonaninput as, forexample, in a supply current monitor and/orlimiter. Precautionsshouldbe taken to ensurethat thepowersupply forthe integrated circuit never becomes re-versed in polarity or that the unit is not inadvertentlyin-stalledbackwards in a socket as an unilimited current surge throughthe resulting forward diode within the IC couldcausefusingoftheinternalconductorsandresultin a destroyedunit. Because these amplifiers are JFET rather than MOSFET input op amps they do not require special handling. Allof thebiascurrentsintheseamplifiersareset by FET current sources. The drain currents for the amplifiers are therefore essentially independent of supply voltages. As with most amplifiers, care should betakenwith lead dress, components placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to theinput to minimiz "pickup"and maximize the frequency of the feedback pole by minimizing the capacitancefromthe input to ground. A feedback pole is createdwhen the feedbackaround any amplifier is resistive. The parallel resistance and capacitancefromthe input of thedevice(usually the invertinginput)toacgroundsetthefrequencyofthepole.In many instances the frequency of this pole is much greaterthanthe expected3 dBfrequencyof the closed loopgain and consequentlythereisnegligible effect on stability margin. However, if the feedback pole is less than approximately six time the expected 3 dB frequencyaleadcapacitor should be placed from the output to the input of the op amp. The value of that added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant.
5/14
LF155 - LF156 - LF157
6/14
LF155 - LF156 - LF157
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LF155 - LF156 - LF157
8/14
LF155 - LF156 - LF157
9/14
LF155 - LF156 - LF157
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LF155 - LF156 - LF157
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LF155 - LF156 - LF157
12/14
LF155 - LF156 - LF157
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP
Dimensions A a1 B b b1 D E e e3 e4 F i L Z
Min. 0.51 1.15 0.356 0.204 7.95
Millimeters Typ. 3.32
Max.
Min. 0.020 0.045 0.014 0.008 0.313
Inches Typ. 0.131
Max.
1.65 0.55 0.304 10.92 9.75 2.54 7.62 7.62 6.6 5.08 3.81 1.52
0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060
3.18
0.125
13/14
DIP8.TBL
PM-DIP8.EPS
LF155 - LF156 - LF157
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions A a1 a2 a3 b b1 C c1 D E e e3 F L M S
Min. 0.1 0.65 0.35 0.19 0.25 4.8 5.8
Millimeters Typ.
Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2
o
Min. 0.004 0.026 0.014 0.007 0.010 0.189 0.228
Inches Typ.
Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244
1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.)
o
0.050 0.150 0.150 0.016 0.157 0.050 0.024
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST log o is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdo m - U.S.A.
ORDER CODE :
14/14
SO8.TBL
PM-SO8.EPS

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